Abstract
One of the major goals of quantum computing - the realization of fault-tolerant quantum error correction - requires continual advances in device performance (quality, speed, and scale) and new capabilities, such as dynamic circuits that utilizes mid circuit measurements and real-time classical communications. In this talk, I will share recent progress on IBM's superconducting quantum processors on both these fronts. I will also discuss our quantum error correction demonstrations on heavy-hexagon lattice that take advantage of dynamic circuits capability. While our future QEC roadmap is dominated by more efficient codes such as quantum LDPC codes, these early quantum error correction demonstrations allow us to learn about the noise in our systems that can guide us in future developments.
[1] N. Sundaresan et al., Nature Communications 14, 2852 (2023)
[2] R. Gupta et al., Nature 625, 259 (2024)